EPM570T144C5N programmable fpga CPLD Complex Programmable Logic Devices 2.5 V 3

Product Specification

EPM570T144C5N programmable fpga CPLD Complex Programmable Logic Devices 2.5 V 3.3 VTQFP-144

Description:                                                                                                           

The MAX® II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast performance, and reliable fitting versus other CPLD architectures. Featuring MultiVolt core, a user flash memory (UFM) block, and enhanced in-system programmability (ISP), MAX II devices are designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR) and sequencing control, and device configuration control.

Features:                                                                                                                

The MAX II CPLD has the following features:

■ Low-cost, low-power CPLD

■ Instant-on, non-volatile architecture

■ Standby current as low as 25 µA

■ Provides fast propagation delay and clock-to-output times

■ Provides four global clocks with two clocks available per logic array block (LAB)

■ UFM block up to 8 Kbits for non-volatile storage

■ MultiVolt core enabling external supply voltages to the device of either 3.3 V/2.5 V or 1.8 V

■ MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic levels

■ Bus-friendly architecture including programmable slew rate, drive strength, bus-hold, and programmable pull-up resistors

■ Schmitt triggers enabling noise tolerant inputs (programmable per pin)

■ I/Os are fully compliant with the Peripheral Component Interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at 66 MHz

■ Supports hot-socketing

■ Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990

■ ISP circuitry compliant with IEEE Std. 1532

Date Sheet :                                                                                                            

Transportations & Payments:                                                                               

FAQ                                                                                

Shipping:

1, We can shipping all over the world by DHL, UPS, FEdex, TNT and EMS.The packaging is very

safe and strong. Please nitfy me you have any special needs
2, It will take around 3-5 days to reach your hands.

Product Type & condition:
Because of the fluctuant sales situation. the stock parts are always changing and the stock list cannot

be, promptly updated.So please consult the stock situation when you inquire.

Buyer Reading:
1. Please confirm receipt of products if the items you received,and if the goods was damaged please

contact us immediately. send the photo to us that we can check and give you best solution

2. We only guarantee delivery in time but we couldn't control the express delivery time. Our related

sales person will be responsible to send the AWB for the delivered goods in the next workday.

you can check the AWB in the website which we send to you. For the AWByou also can call to the

local branch of the express company in your company.

Pre-sales service :

1. Our team design and make solutions based on different requirements from different customers.

2. We provide 24-hours service,and every message you quote inquiry will be replied within12 hours