Product Specification

STM32WB55CGU6 QFPN48 MCU Chips Low Power High Performance IC

Description:

The STM32WB55xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy SIG specification v5.0 and with IEEE 802.15.4-2011. They contain a dedicated Arm® Cortex® -M0+ for performing all the real-time low layer operation.

The STM32WB55xx devices are designed to be extremely low-power and are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. The Cortex®-M4 core features a Floating point unit (FPU) single precision that supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.
Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.

The STM32WB55xx devices embed high-speed memories (up to 1 Mbyte of Flash memory, up to 256 Kbyte of SRAM), a Quad-SPI Flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.
Direct data transfer between memory and peripherals and from memory to memory is supported by fourteen DMA channels with a full flexible channel mapping by the DMAMUX peripheral.

Feature

• Includes ST state-of-the-art patented technology
• Radio
  • 2.4 GHz
  • RF transceiver supporting Bluetooth® 5 specification, IEEE 802.15.4-2011 PHY and MAC, supporting Thread and ZigBee® 3.0
  • RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -100 dBm (802.15.4)
  • Programmable output power up to +6 dBm with 1 dB steps
  • Integrated balun to reduce BOM
  • Support for 2 Mbps
  • Dedicated Arm® 32-bit Cortex® M0 + CPU for real-time Radio layer
  • Accurate RSSI to enable power control
  • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
  • Support for external PA
  • Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB55-01E3 or MLPF-WB55-02E3)
• Ultra-low-power platform
  • 1.71 to 3.6 V power supply
  • – 40 °C to 85 / 105 °C temperature ranges
  • 13 nA shutdown mode
  • 600 nA Standby mode + RTC + 32 KB RAM
  • 2.1 µA Stop mode + RTC + 256 KB RAM
  • Active-mode MCU: < 53 µA / MHz when RF and SMPS on
  • Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 64 MHz, MPU, 80 DMIPS and DSP instructions
• Performance benchmark
  • 1.25 DMIPS/MHz (Drystone 2.1)
  • 219.48 CoreMark® (3.43 CoreMark/MHz at 64 MHz)
• Energy benckmark
  • 303 ULPMark™ CP score
• Supply and reset management
  • High efficiency embedded SMPSstep-down converter with intelligent bypass mode
  • Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
  • Ultra-low-power POR/PDR
  • Programmable voltage detector (PVD)
  • VBAT mode with RTC and backup registers
• Clock sources
  • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
  • 32 kHz crystal oscillator for RTC (LSE)
  • Internal low-power 32 kHz (±5%) RC (LSI1)
  • Internal low-power 32 kHz (stability ±500 ppm) RC (LSI2)
  • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25% accuracy)
  • High speed internal 16 MHz factory trimmed RC (±1%)
  • 2x PLL for system clock, USB, SAI and ADC